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Bob Eisenstadt
Principal Engineer
Alchip Technologies, Inc.
Bob is currently Principal Engineer at Alchip Technologies, which is a rapidly growing fables ASIC company. For the past 22 years Bob has worked in a wide variety of ASIC design and consulting positions in Silicon Valley. Bob has extensive hands on ASIC design experience in: architecture, RTL design, Logic Verification, Timing Analysis, Physical Design, and Physical Verification. In 2003 Bob was co-founder and Director of Engineering at the startup Silicon Mosaic, where he developed and patented a fundamental power gating solution. Bob holds a BSEE from Cornell University along with MSEE and MBA degrees from Santa Clara University.
Colin Holehouse
Chief Engineer
ARC
Colin Holehouse has worked in the Electronics Design industry since graduating in 1986, with a focus on physical implementation of SoCs and their related design flows. His early work experience was at Philips working on CAD tools, moving on to Cadence Design Systems where he led design teams to tape out several large SoCs. He is currently Chief Engineer at ARC International’s Development Center in St. Albans, UK where he is responsible for the development and implementation of reference design flows to enable the seamless integration of ARC Configurable Processors and Subsystems with cutting edge SOC design tools.
Dr John Goodenough
WW Director of Design Technolgy
ARM
John Goodenough serves as World Wide Director of Design Technology at ARM Inc., where he has strategic responsibility for all aspects of CAD and EDA design methodology. This includes both ARM’s internal production and external IP deployment methodologies. He works extensively with ARM’s design chain partners and customers to ensure best in class integration of ARM deliverables to enable customers flow. Dr Goodenough began his career as a research fellow at Sheffield University, UK, investigating novel VLSI signal processing architectures before co-founding Infinite Designs a consultancy specializing in advanced ASIC and embedded system design methodologies. Infinite Designs was acquired by ARM in 2000 where John has held a number of executive roles in technology and infrastructure management. John serves as a board member of several industry bodies including Si2 and Accellera and was instrumental in founding the SPIRIT initiative for IP packaging. Dr Goodenough received a BSc from Durham University in 1998 and PhD in Integrated Circuit Design from Sheffield University in 1995.
Steev Wilcox
Founder and Chief Architect
Azuro
Steev is responsible for all aspects of algorithm design at Azuro, and is the architect of Azuro's technology. He is a member of the Board of Directors and a founder of the company. Prior to co-founding Azuro, Steev spent three years with PA Consulting Group in their Wireless Technology Practice, where his experience included 2G base station power control algorithms, 2.5G base station transmit ASIC prototyping, and 3G mobile embedded systems. Prior to PA Consulting, Steev was a member of the Asynchronous Logic Research Group at Cambridge Computer Laboratory. Steev holds an MA in Mathematics and a PhD in Computer Science from the University of Cambridge, UK.
Dr. Chi-Ping Hsu
Corporate Vice President, Synthesis and Power Forward
Cadence Design Systems
Dr. Chi-Ping Hsu is Corporate Vice President, Synthesis and Power Forward. He was President and COO of Get2Chip before merging with Cadence in April 2003. Chi-Ping also initiated and is leading the Power Forward Initiative with organizations across the company. Prior to Get2Chip, Chi-Ping was Executive Staff of Technology and Products (CTO) at Avant! for seven years, during which he played a crucial role in the growth of the Avant! annual business from $7M to $380M. He was leading the engineering, product strategies, marketing, business development, M&A, and strategic investments. His vision, management, and execution led to the success of Avant! in the marketplace from 1995 to 2001.
Jiurong Cheng
VP of Software Engineering
Denali Software, Inc.
Jiurong Cheng is responsible for all EDA software engineering including the MMAVT simulation group. Prior to joining Denali in July 1998, he had been working on various EDA tools at Synopsys and LSI Logic. Mr. Cheng holds an MS in Mathematics from the University of Arizona.
Toshimi Kamikariya
General Manager of Business Development and EDA Support
DNP
Toshimi Kamikariya works in DNP LSI Design Co., Ltd as a general manager of Business Development and EDA Support Department. He has over 25 years experience in design servive industry, and has engaged in building and supporting LSI design environment. Especially, he has expertise in design methodology and flow, and has brought lots of design, that use leading edge fab processes, into success.
Lee Chu
VP of Emerging Business
Faraday Technology Corporation
Lee Chu has been in the Semiconductor business for over 20 years, he has an extensive business and technical background in ASIC, IP and EDA industry. He joined Faraday Technology in 1999. As VP of Sales, he has managed and directed the company Sales and Operations across North America, accomplished proven track record in Sales revenue. business management and planning. In 2005 he was appointed VP of Emerging Business where he leads Faraday's IP Business deployment in Sales and Marketing..Prior joining Faraday, he has held management position in Aspec Technology and Cadence Design Systems.
Lee holds a MS degree in Electrical Engineering and Computer Sciences from University of California, Santa Barbara.
Magdy S. Abadir
Manager for EDA Strategy, Vendor Relations and Customer Collaborations, Tools and Methodology Organization
Freescale Semiconductor
Magdy S. Abadir received the B.S. degree with honors in Computer Science from the University of Alexandria, Egypt in 1978, the M.S. degree in Computer Science from the University of Saskatchewan, Saskatoon, Canada, in 1981, and the Ph.D. degree in Electrical Engineering from the University of Southern California, Los Angeles, in 1986.
Currently he is the manager for EDA Strategy, Vendor Relations and Customer Collaborations, Tools and Methodology Organization, Freescale Semiconductor. Prior to joining Motorola he was the General Manager of Best IC Labs in Austin Texas (a Burn-in and Test Engineering firm). From 1986 to 1994 he worked at the Microelectronics and Computer Technology Corporation (MCC) in various leadership roles and he reached the level of senior member of the technical staff.
Dr. Abadir has been selected in 2005 as an IEEE fellow for contribution the verification and test of microprocessors. He has 8 patents issued plus several that has been filed. He co-founded and chaired a series of international workshops on the economics of design, test and manufacturing and on microprocessor test and verification (MTV). He has co-edited several books on those subjects, and he also published over 200 technical journal and conference papers in the areas of test economics, design for test, and design verification and economics. Three of his papers received best paper awards (DATE 98, ASP-DAC 2002, and DATE 2003). Dr. Abadir is the associate editor of Design and Test Magazine and he is an adjunct faculty at the University of Texas at Austin.
Yoshimi Asada
Deputy General Manager, Technology Development Division Fujitsu Limited
Fujitsu
Yoshimi Asada currently serves as a deputy general manager of the Technology Development Division in Fujitsu's Electron Device Business Unit. Mr. Asada has over 20 years of high-speed and low power circuit technology development and design experience. His design experience includes the development of high-speed LSIs for super computers, media processing SoCs, and SoCs for wireless communication. He also has technology development experience in power grid and substrate noise analysis, low power circuit techniques. He received MS degree of electronics engineering at Osaka University, Osaka. He is a member of the IEEE, IEICE.
Stylianos Diamantidis
Founder, Managing Director, CTO
Globetech Solutions
Stylianos Diamantidis is a founder of Globetech Solutions, where he currently serves as Managing Director and CTO. With over 10 years of experience in design verification, he is responsible for driving IP product strategy, engineering and consulting services. Prior to Globetech, Stylianos managed system-level diagnostic software development at Silicon Graphics Inc., spanning across server, supercomputer, and graphics products. He has held engineering positions in design verification, test and diagnosis. Stylianos holds a BEng in Computer Systems Engineering from the University of Kent at Canterbury, UK, and a MS in Electrical Engineering from Stanford University. He is a Member of the IET, IEEE, IEEE-SA and IEEE-DASC.
Ameesh Desai
Senior Director, Design Tools & Methodology
LSI Corporation
Ameesh Desai is the Senior Director of LSI’s Design Tools & Methodology department and is charged with overseeing the development of EDA Tools and Methodology to support LSI’s custom silicon and standard product design needs. His team is also responsible for with managing LSI’s technical and business relationships with EDA vendor partners and the university design sciences research community. Ameesh is actively involved with promoting improved design tool & flow integration through his participation in standards bodies, including serving as the current chairman of the board for Si2. Ameesh earned a Bachelor of Electrical Engineering degree from the University of Bombay, India and an MSEE degree from University of Texas at Austin in Electrical Engineering.
S N Padmanabhan
Senior Vice President
MindTree Consulting
Padmanabhan completed his BE in Electronics & Communication Engineering with Honours from Madras University in 1984 and went on to do his Masters in Electrical Engineering from Indian Institute of Technology, Kanpur in 1986. Padmanabhan joined Wipro’s R&D as a campus recruit in 1986 and went on to hold several positions there. He moved on to build Wipro’s capabilities in VLSI Design and helped to grow this as one of the larger strengths of the organization. Padmanabhan joined MindTree Consulting in 2000 and has been involved in building its Hardware and IC Design capabilities since then. Currently he is a Senior Vice President addressing the Semiconductor market. He was instrumental in doubling this segment year on year over the past 3 years.
Toshiyuki Saito
Senior Manager, Design Engineering Division
Corporate Business Planning Division
NEC Electronics
Toshiyuki Saito serves as a senior manager of the Design Engineering Division as well as the Corporate Business Planning Division at NEC Electronics Corporation. He has managed many foundation technology development projects for advanced LSI design, including the UltimateLowPower™1 design technology for 65nm mobile SoCs. He received his M.S. degree in computational physics of materials from Kanazawa University in 1984, and joined NEC Corporation, launching his 22-year career in VLSI design engineering. He moved to NEC Electronics Corporation in 2002 when the company was established through a spinoff of the semiconductor business operations from NEC Corporation.
Hiroshi Iwaki
Nippon System Ware col, Ltd (NSW)
Hiroshi Iwaki is a member of the System Logic Technology Division of NSW (Nippon System Ware Co.,Ltd). He has experiences in front-end design, back-end design, chip verification and evaluation. Mr. Iwaki managed the development of the original chip product which is a companion chip for Intel and STRONG ARM. He provides a platform environment with peripheral cores for ARM/ARC users, and he delivers broad services for customers systems, based on 20 years of engineering experiences.
Barry Dennington
Senior Vice President of SoC Design Technology
NXP Semiconductors
Barry Dennington has been in the semiconductor business for the past thirty years and has held leadership positions in Innovation & Technology and Business Management, including multiple overseas assignments in North America and Europe. Barry joined Philips Semiconductors in February 2000 as Vice President of the Computing and ASIC Business based in San Jose, California. In March 2002 he took up the position of VP of the Technology and Customer Engineering Group, which provided 'System on Chip (SoC) Solutions' and technology services to internal and external customers. Then, in July 2005, he was appointed VP of SoC Design Technology where he leads EDA Design Tool and Flow development, IP development and ReUse and Philips World Wide Design Center network. In addition, Barry leads the Digital Design Technology Competency domain for Philips Semiconductors.
Prior to joining NXP Semiconductors, Barry held Business Management roles in Plessey Semiconductors focusing on SoC Solutions for Communications and Medical markets. He started his semiconductor career in 1975 as an ASIC Design Engineer with American Micro Systems Inc (AMI) and then moved onto ASIC marketing and design center management with Thomson and then, after the merger with SGS, ST Microelectronics.
Barry holds an MBA from The City University of London and a Higher National Diploma Electrical Engineering.
Tom Miller
General Manager, Logical Business Unit and VP of R&D
Sequence Design
Tom Miller has over 22 years experience in the EDA industry. He was one of the original founders of Sente Inc. While at Sente Inc., Mr. Miller was the Vice President of Engineering focusing on IC power estimation products. Prior to his position at Sente, Mr. Miller was the Vice President of Engineering for the System Physical Group at Cadence Design Systems, dealing with the physical design and electrical analysis of printed circuit boards. He also held the position of Vice President of Engineering for the PCB Group at Valid Logic Systems. Mr. Miller holds a BS in both Mathematics and Computer Science, as well as a MS in Computer Science from the University of Illinois. He has published papers on software development techniques and hardware description languages, and holds a patent for RTL power estimation methodologies and techniques.
Michael Chen
President
Silicon Integrated Systems Corp. (SiS)
Michael Chen currenly serves as President of Silicon Integrated Systems Corp. (SiS), a leading fabless design company in Asia. For the past 20 years, Mr. Chen has worked in a wide variety of silicon integrated circuit design development and management. He was the CTO and a member of the Board of Directors of SiS.
Mr. Chen received his M. S. degree in Electrical Engineering from National Taiwan University.
Feng Chen
Senior Account Director, Design Service
SMIC
Feng Chen joined the SMIC in 2002, and currently is senior account director of SMIC design service, his group is responsible for ASIC implementation, reference flow development, tech file and pdk generation, DFM support and application supports of world wide customers of SMIC. Previously, he's working for Bell Labs, Lucent microelectronics, and Agere system in mobile phone IC design. He received BS of applied physics from Tsinghua University in Beijing, and MS of electronic engineering from Lehigh University.
Chou-Te Kang
VP of R&D Center
Socle Technology Corperation
Chou-Te Kang is Vice President of R&D Center at Socle Technology Corp. His organization is responsible for providing ARM™ core hardening and solutions; ARM™ based IPs and platform’s integration, verification and development kit solutions; and all ARM™ embedded SoC platform service and ASIC implementation service. He joined Socle since 2001. Previous to Socle, he served as CAD manager in Macornix and focus on advanced design methodology development. Mr. Kang received his B.S. in computer science from Tunghai University, Taiwan, his M.S. in electrical engineering from Santa Clare University.
Scott Evans
Director of Software
Sonics, Inc.
Scott Evans currently serves as Director of Software at Sonics Inc. He manages and supports all aspects of software development, operations, and related services for both internal and external Sonics customers. Scott has over 25 years of experience in the EDA area. Prior to working for Sonics, he worked in many areas of design automation including early work in gate array place and route systems, floor planning, hierarchical design flow, both standard cell and FPGA place and route, ASIC synthesis, and design flow automation. He garnered this experience at several startups and established companies such as Atmel, Cadence, and Hughes Aircraft. Scott received his BS degree in Computer Science from the University of Southern California in 1981.
Ashish Dixit
Vice President of Hardware Engineering
Tensilica
Ashish Dixit, Vice President of Hardware Engineering. Ashish joined Tensilica in early 1998. Previously he held numerous positions ranging from design engineer to director of engineering at Silicon Graphics, working on MIPS VLSI chip development. From 1983 to 1989 Ashish was a quality and reliability engineer as well as a logic design engineer at Intel Corporation. He has been issued eight patents related to configurable processors and memory management in RISC and CISC processors.
Takashi Nabuchi
Manager, SoC Design Division
Toppan Technical Design Center Co., Ltd
Takashi Nabuchi is a manager of the SoC Design Division in Toppan Technical Design Center. He has over 25 years design experience. Being as a project leader of Digital LSI development, he carried out over 100 projects of RTL to GDS. Also he has made many projects success including the development for next generation standard flow, start up for the foundry design services and the design for ARM CPU cores with considering High Speed and Low power design. Now, he is providing the design services for a lot of semiconductor companies.
Dr. Fu-Chieh Hsu
Vice President, Design and Technology Platforms
TSMC
Dr. Fu-Chieh Hsu joined TSMC in April 2004 as Vice President of Design and Technology Platforms. In this capacity, he is responsible for all design service operations at TSMC, in collaboration with TSMC Marketing and R&D defining and providing design platforms.
Dr. Hsu previously founded Mosys and served as Chairman and CEO from 1991 until 2004. He was formerly Chairman and President of Myson Technology Inc. (now Myson Century Inc.) from 1990 to 1991 and prior to that served as Vice President and Chief Technical Officer at Integrated Device Technology Inc. Dr. Hsu also served at Hewlett-Packard Laboratories.
Dr. Hsu received his Bachelor of Science degree in electrical engineering from National Taiwan University and his MS and Ph.D. degrees in electrical engineering and computer sciences from University of California, Berkeley. He holds 55 U.S. patents.
Garry Shyu
Director, Design Tools and DFM Support
UMC
Mr. Shyu is currently Director of design tools and DFM support within UMC Design Methodology organization, managing collaboration projects with EDA vendors and providing support to customers. He has more than 20 years experience in the semiconductor industry. Prior to joining UMC, Mr. Shyu served in various technical and management positions in semiconductor companies including National semiconductor, Sun Microsystems and LSI logic. He received BS of Telecommunication Engineering from National Chao-Tung University in Taiwan, MS in Electrical Engineering from National Taiwan University, MS in computer engineering from University of California at Davis.
Nianfeng Li
Corporate Vice President
VeriSilicon
Nianfeng Li is the Corporate Vice President of VeriSilicon, in charge of Program Management Office (PMO) and Design Methodology. Prior to joining VeriSilicon in April 2005, he held various management and technical lead positions at Synopsys during his 10 years with the company. He successfully led multiple ASIC design service projects at Synopsys Professional Service, for customers who included world leading semiconductor companies as well as Silicon Valley start ups. He also held technical management positions at Synopsys China and Asia Pacific. And earlier in his career was an analog design engineer.
Nianfeng Li received his MSEE degree at Academia Sinica, China and his BSEE degree at Wuhan University.
Joel Rosenberg
Senior Marketing Director
Virage Logic
Joel Rosenberg serves as Senior Marketing Director for Virage Logic. As a 28-year semiconductor industry veteran, Joel has held senior engineering, marketing, business development and product line management positions at Fairchild, MMI, Signetics, WSI, Concurrent Logic, Atmel, and Virage Logic. Joel has published several papers in the areas of Cache Logic FPGAs and Design Security. His experience includes Semiconductor Memory, FPGAs, System-on-Chip (SoC) and Intellectual Property. Joel holds a BS in Electrical and Computer Engineering from UC Santa Barbara, an MBA from the University of Santa Clara and a California Real Estate License.
Cary Ussery
President & CEO, Founder
Vivace Semiconductor
Cary has a strong, successful engineering and management background. He has worked in a government contractor (Intermetrics, Inc.), a startup company (Vantage Analysis Systems subsequently purchased by Viewlogic Systems), and an established EDA software company (Cadence Design Systems). He is a founder and President & CEO of Improv Systems, Inc., a startup company delivering configurable DSP processor IP for multimedia and communications chips. Prior to Improv Systems, Cary was the Group Director of Core Technology for Cadence's Alta Business Unit, which includes system specification, language processing, system simulation and high-level synthesis. He has managed teams of up to 75 engineers and has broad experience in new product development and managing existing product lines with revenues of up to $80 million. He has written numerous papers and is co-author of the textbook "VHDL: Hardware Description and Design". He received a BA in Music and a BA in Math from Bard College.
Ron Burns
General Manager - Semiconductor and Systems
Wipro Technologies
Ron joins Wipro with a significant sales and marketing background spanning over 20 years of Semiconductor, Electronic Design Automation, and Embedded Systems experience. Most recently, Ron served as VP, WW Sales Teja Technologies, a new venture focused on multicore embedded systems, recently sold to ARC. Prior to Teja, Ron was the VP-Marketing for Axis Systems, a technology leader in HW/SW Co-Verification Solutions.
[1] UltimateLowPower is a trademark of NEC Electronics Corporation in Japan, the United States of America and Germany.
